Implement optimized movemasks for NEON #1236
Open
+87
−16
Conversation
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
onalante-ebay
force-pushed
the
neon_bitmask
branch
from
10bab43 to
c75a0ea
Compare
While the scalar post-processing required to obtain one bit per lane makes this more expensive than directly supporting variable-sized bit groups (as done in Zstandard[^1]), the result is still an improvement over the current lane-by-lane algorithm. [^1]: See facebook/zstd#3139, namely `ZSTD_row_matchMaskGroupWidth`.
onalante-ebay
force-pushed
the
neon_bitmask
branch
from
c75a0ea to
ffaa19d
Compare
Contributor
|
I've suggested an improvement of the 64 bit version there: https://godbolt.org/z/b7henc933 |
Author
|
Applied, thank you for the suggestion. I will fix the GCC build in a moment. |
onalante-ebay
force-pushed
the
neon_bitmask
branch
from
371ab6b to
d205b15
Compare
| template <class A, class T, detail::enable_sized_t<T, 1> = 0> | ||
| XSIMD_INLINE uint64_t mask(batch_bool<T, A> const& self, requires_arch<neon>) noexcept | ||
| { | ||
| uint8x16_t inner = self; |
Contributor
There was a problem hiding this comment.
You should probably use the method described in https://github.com/DLTcollab/sse2neon/blob/ade5552a32852422e4f34f0beaa51790ef9f4171/sse2neon.h#L5574.
It performs the reduction in parallel and that seems more efficient!
Contributor
|
FYI, I'm working on the aarch64 version in #1237 |
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
2 participants
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
While the scalar post-processing required to obtain one bit per lane
makes this more expensive than directly supporting variable-sized bit
groups (as done in Zstandard1), the result is still an improvement
over the current lane-by-lane algorithm.
To reduce duplication,
XSIMD_LITTLE_ENDIANis moved frommath/xsimd_rem_pio2.hpptoconfig/xsimd_config.hpp, and will now beavailable outside the defining header.
Footnotes
See [lazy] Optimize ZSTD_row_getMatchMask for levels 8-10 for ARM facebook/zstd#3139, namely
ZSTD_row_matchMaskGroupWidth. ↩