x86: correctly handle XACQUIRE/XRELEASE#2882
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jxors wants to merge 1 commit intocapstone-engine:nextfrom
Open
x86: correctly handle XACQUIRE/XRELEASE#2882jxors wants to merge 1 commit intocapstone-engine:nextfrom
jxors wants to merge 1 commit intocapstone-engine:nextfrom
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This patch changes XACQUIRE/XRELEASE decoding to happen only after all prefixes have been read. This is necessary to handle all possible orderings of prefixes. For example, both F3F0 and F0F3 should be treated as XRELEASE. The last REP prefix is taken to distinguish between XACQUIRE and XRELEASE. So F2F3F0 = XRELEASE, F3F2F0 = XACQUIRE. This behavior is specified in the Intel SDM Section 6.1 - XACQUIRE/XRELEASE. Additionally, this patch changes the disassembly printing of LOCKs and XACQUIRE/XRELEASE to reflect the actual prefixes used. Previously, XCHG instructions would always be printed without LOCK and everything else with LOCK. For this, an extra field is added to MCInst.
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Detailed description
This patch changes XACQUIRE/XRELEASE decoding to happen only after all prefixes have been read.
This is necessary to handle all possible orderings of prefixes. For example, both F3F0 and F0F3 should be treated as XRELEASE. The last REP prefix is taken to distinguish between XACQUIRE and XRELEASE. So
F2F3F0= XRELEASE,F3F2F0= XACQUIRE.This behavior is specified in the Intel SDM Section 6.1 - XACQUIRE/XRELEASE.
Additionally, this patch changes the disassembly printing of LOCKs and XACQUIRE/XRELEASE to reflect the actual prefixes used. Previously, XCHG instructions would always be printed without LOCK and everything else with LOCK.
For this, an extra field is added to MCInst.
Test plan
I have added 9 new tests in
issues/x86-xacquire-xrelease.yaml. There were also already 4 tests inissues.yamlthat were relevant to this change.