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- Introduced CS_MODE_M68K_CPU32 to support the M68K CPU32 architecture in the Python bindings and C headers. - Updated the instruction table generator to include new CPU32-specific instructions: `bgnd`, `tbls`, `tblu`, `tblsn`, and `tblun`. - Enhanced the instruction decoding logic in `cs.c` to account for CPU32 mode. - Added test cases for new instructions and ensured compatibility with existing M68K modes. - Updated YAML test files to validate the behavior of new instructions under different M68K modes.
build_cpush_cinv: use op1->reg instead of op1->imm for address register operand. Writing to imm (uint64_t) when reg (m68k_reg, uint32_t) is read back causes garbage values on big-endian targets (PPC64, s390x) due to union byte order mismatch. M68K_printInst: cast imm to uint32_t before passing to PRIx32 format. Passing uint64_t to a PRIx32 format specifier is UB; on 32-bit big-endian MIPS the high word (0) is read instead of the low word containing the instruction bytes. Fixes cstest details failures on QEMU Linux PPC64, s390x, Mips32.
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