From 70095f3a25abb0c02a26fae8f101c5dbde589def Mon Sep 17 00:00:00 2001 From: henryrgithub Date: Tue, 6 Jan 2026 21:24:19 -0800 Subject: [PATCH 1/2] Add STM32F303Nucleo. Disable broken examples. --- examples/stmicro/stm32/build.zig | 11 ++-- examples/stmicro/stm32/src/blinky.zig | 9 ++-- port/stmicro/stm32/build.zig | 11 ++++ .../stm32/src/boards/STM32F303NUCLEO.zig | 54 +++++++++++++++++++ 4 files changed, 77 insertions(+), 8 deletions(-) create mode 100644 port/stmicro/stm32/src/boards/STM32F303NUCLEO.zig diff --git a/examples/stmicro/stm32/build.zig b/examples/stmicro/stm32/build.zig index 8a63f0788..8d301f283 100644 --- a/examples/stmicro/stm32/build.zig +++ b/examples/stmicro/stm32/build.zig @@ -14,6 +14,7 @@ pub fn build(b: *std.Build) void { const stm32 = mb.ports.stm32; const available_examples = [_]Example{ + .{ .target = stm32.boards.stm32f303nucleo, .name = "stm32f303nucleo_Blinky", .file = "src/blinky.zig" }, .{ .target = stm32.boards.stm32f3discovery, .name = "stm32f3discovery", .file = "src/blinky.zig" }, // TODO: stm32.pins.GlobalConfiguration is not available on those targets // .{ .target = stm32.chips.stm32f407vg, .name = "stm32f407vg", .file = "src/blinky.zig" }, @@ -28,16 +29,16 @@ pub fn build(b: *std.Build) void { .{ .target = stm32.chips.STM32F103C8, .name = "STM32F1xx_blink", .file = "src/blinky.zig" }, .{ .target = stm32.chips.STM32F100RB, .name = "STM32F1xx_semihost", .file = "src/semihosting.zig" }, //QEMU target: stm32vldiscovery - .{ .target = stm32.chips.STM32F103C8, .name = "STM32F1xx_adc", .file = "src/stm32f1xx/adc.zig" }, - .{ .target = stm32.chips.STM32F103C8, .name = "STM32F1xx_adv_adc", .file = "src/stm32f1xx/advanced_adc.zig" }, - .{ .target = stm32.chips.STM32F103C8, .name = "STM32F1xx_dual_adc", .file = "src/stm32f1xx/adc_dualmode.zig" }, + // .{ .target = stm32.chips.STM32F103C8, .name = "STM32F1xx_adc", .file = "src/stm32f1xx/adc.zig" }, + // .{ .target = stm32.chips.STM32F103C8, .name = "STM32F1xx_adv_adc", .file = "src/stm32f1xx/advanced_adc.zig" }, + // .{ .target = stm32.chips.STM32F103C8, .name = "STM32F1xx_dual_adc", .file = "src/stm32f1xx/adc_dualmode.zig" }, .{ .target = stm32.chips.STM32F103C8, .name = "STM32F1xx_gpio", .file = "src/stm32f1xx/gpio.zig" }, .{ .target = stm32.chips.STM32F103C8, .name = "STM32F1xx_uart_echo", .file = "src/stm32f1xx/uart_echo.zig" }, .{ .target = stm32.chips.STM32F103C8, .name = "STM32F1xx_uart_log", .file = "src/stm32f1xx/uart_log.zig" }, - .{ .target = stm32.chips.STM32F103C8, .name = "STM32F1xx_i2c", .file = "src/stm32f1xx/i2c.zig" }, + // .{ .target = stm32.chips.STM32F103C8, .name = "STM32F1xx_i2c", .file = "src/stm32f1xx/i2c.zig" }, .{ .target = stm32.chips.STM32F103C8, .name = "STM32F1xx_i2c_bus_scan", .file = "src/stm32f1xx/i2c_bus_scan.zig" }, .{ .target = stm32.chips.STM32F103C8, .name = "STM32F1xx_hd44780", .file = "src/stm32f1xx/hd44780.zig" }, - .{ .target = stm32.chips.STM32F103C8, .name = "STM32F1xx_ssd1306", .file = "src/stm32f1xx/ssd1306.zig" }, + // .{ .target = stm32.chips.STM32F103C8, .name = "STM32F1xx_ssd1306", .file = "src/stm32f1xx/ssd1306.zig" }, .{ .target = stm32.chips.STM32F103C8, .name = "STM32F1xx_spi", .file = "src/stm32f1xx/spi.zig" }, .{ .target = stm32.chips.STM32F103C8, .name = "STM32F1xx_usb_hid", .file = "src/stm32f1xx/usb_hid.zig" }, .{ .target = stm32.chips.STM32F103CB, .name = "STM32F1xx_usb_cdc", .file = "src/stm32f1xx/usb_cdc.zig" }, diff --git a/examples/stmicro/stm32/src/blinky.zig b/examples/stmicro/stm32/src/blinky.zig index faff38f44..74968ec62 100644 --- a/examples/stmicro/stm32/src/blinky.zig +++ b/examples/stmicro/stm32/src/blinky.zig @@ -21,6 +21,12 @@ pub fn main() !void { pins.led, }; break :res .{ pins, all_leds }; + } else if (comptime microzig.config.board_name != null and std.mem.eql(u8, microzig.config.board_name.?, "STM32F303NUCLEO")) { + const pins = board.leds_config.apply(); + const all_leds = .{ + pins.LD2, + }; + break :res .{ pins, all_leds }; } else if (comptime microzig.config.board_name != null and std.mem.eql(u8, microzig.config.board_name.?, "STM32F3DISCOVERY")) { const pins = board.leds_config.apply(); const all_leds = .{ @@ -33,16 +39,13 @@ pub fn main() !void { pins.LD9, pins.LD10, }; - break :res .{ pins, all_leds }; } else if (comptime microzig.config.board_name != null and std.mem.eql(u8, microzig.config.board_name.?, "STM32L476DISCOVERY")) { const pins = board.leds_config.apply(); - const all_leds = .{ pins.LD4, pins.LD5, }; - break :res .{ pins, all_leds }; } else { @compileError("blinky is not (yet?) implemented for this target"); diff --git a/port/stmicro/stm32/build.zig b/port/stmicro/stm32/build.zig index 9d2cfae46..40150bdcd 100644 --- a/port/stmicro/stm32/build.zig +++ b/port/stmicro/stm32/build.zig @@ -11,6 +11,7 @@ boards: struct { stm32f4discovery: *const microzig.Target, stm3240geval: *const microzig.Target, stm32f429idiscovery: *const microzig.Target, + stm32f303nucleo: *const microzig.Target, }, pub fn init(dep: *std.Build.Dependency) Self { @@ -30,6 +31,16 @@ pub fn init(dep: *std.Build.Dependency) Self { return .{ .chips = chips, .boards = .{ + .stm32f303nucleo = chips.STM32F303RE.derive(.{ + .board = .{ + .name = "STM32F303NUCLEO", + .root_source_file = b.path("src/boards/STM32F303NUCLEO.zig"), + }, + .hal = microzig.HardwareAbstractionLayer{ + .root_source_file = b.path("src/hals/STM32F303.zig"), + }, + .stack = .{ .ram_region_name = "CCMRAM" }, + }), .stm32l476discovery = chips.STM32L476VG.derive(.{ .board = .{ .name = "STM32L476DISCOVERY", diff --git a/port/stmicro/stm32/src/boards/STM32F303NUCLEO.zig b/port/stmicro/stm32/src/boards/STM32F303NUCLEO.zig new file mode 100644 index 000000000..dcec005dc --- /dev/null +++ b/port/stmicro/stm32/src/boards/STM32F303NUCLEO.zig @@ -0,0 +1,54 @@ +const std = @import("std"); + +pub const microzig = @import("microzig"); + +pub const hal = microzig.hal; +pub const rcc = hal.rcc; + +//pub const uart_logger = hal.uart.UARTLogger(.USART1); + +pub const leds_config = (hal.pins.GlobalConfiguration{ + .GPIOA = .{ + .PIN5 = .{ .name = "LD2", .mode = .{ .output = .{ .resistor = .Floating, .o_type = .PushPull } } }, + }, +}); + +//pub fn init() void { +// rcc.enable_hse(8_000_000); +// rcc.enable_pll(.HSE, .Div1, .Mul5) catch { +// @panic("PLL faile to enable"); +// }; +// rcc.select_pll_for_sysclk() catch { +// @panic("Faile to select sysclk"); +// }; +//} +// +//// Init should come first or the baud_rate would be too fast for the default HSI. +//pub fn init_log() void { +// _ = (hal.pins.GlobalConfiguration{ +// .GPIOC = .{ +// .PIN4 = .{ .mode = .{ .alternate_function = .{ .afr = .AF7 } } }, +// .PIN5 = .{ .mode = .{ .alternate_function = .{ .afr = .AF7 } } }, +// }, +// }).apply(); +// uart_logger.init(.{ +// .baud_rate = 115200, +// .dma = hal.dma.DMA1_Channel4.get_channel(), +// }); +//} +// +//pub fn i2c1() hal.i2c.I2C_Device { +// _ = (hal.pins.GlobalConfiguration{ +// .GPIOB = .{ +// // I2C +// .PIN6 = .{ .mode = .{ .alternate_function = .{ +// .afr = .AF4, +// } } }, +// .PIN7 = .{ .mode = .{ .alternate_function = .{ +// .afr = .AF4, +// } } }, +// }, +// }).apply(); +// +// return hal.i2c.I2C_Device.init(.I2C1); +//} From ef98a5603af788aba584d3b7208481a4494b098a Mon Sep 17 00:00:00 2001 From: henryrgithub Date: Fri, 9 Jan 2026 20:16:57 -0800 Subject: [PATCH 2/2] Uncommented examples. Removed commented lines from Nucleo --- examples/stmicro/stm32/build.zig | 11 +++-- .../stm32/src/boards/STM32F303NUCLEO.zig | 43 ------------------- 2 files changed, 5 insertions(+), 49 deletions(-) diff --git a/examples/stmicro/stm32/build.zig b/examples/stmicro/stm32/build.zig index 8d301f283..2231e806b 100644 --- a/examples/stmicro/stm32/build.zig +++ b/examples/stmicro/stm32/build.zig @@ -26,19 +26,18 @@ pub fn build(b: *std.Build) void { .{ .target = stm32.boards.stm32l476discovery, .name = "STM32L476Discovery_Lcd", .file = "src/stm32l476/lcd.zig" }, .{ .target = stm32.boards.stm32l476discovery, .name = "STM32L476Discovery_Blinky", .file = "src/blinky.zig" }, .{ .target = stm32.boards.stm32l476discovery, .name = "STM32L476Discovery_HTS221", .file = "src/hts221.zig" }, - .{ .target = stm32.chips.STM32F103C8, .name = "STM32F1xx_blink", .file = "src/blinky.zig" }, .{ .target = stm32.chips.STM32F100RB, .name = "STM32F1xx_semihost", .file = "src/semihosting.zig" }, //QEMU target: stm32vldiscovery - // .{ .target = stm32.chips.STM32F103C8, .name = "STM32F1xx_adc", .file = "src/stm32f1xx/adc.zig" }, - // .{ .target = stm32.chips.STM32F103C8, .name = "STM32F1xx_adv_adc", .file = "src/stm32f1xx/advanced_adc.zig" }, - // .{ .target = stm32.chips.STM32F103C8, .name = "STM32F1xx_dual_adc", .file = "src/stm32f1xx/adc_dualmode.zig" }, + .{ .target = stm32.chips.STM32F103C8, .name = "STM32F1xx_adc", .file = "src/stm32f1xx/adc.zig" }, + .{ .target = stm32.chips.STM32F103C8, .name = "STM32F1xx_adv_adc", .file = "src/stm32f1xx/advanced_adc.zig" }, + .{ .target = stm32.chips.STM32F103C8, .name = "STM32F1xx_dual_adc", .file = "src/stm32f1xx/adc_dualmode.zig" }, .{ .target = stm32.chips.STM32F103C8, .name = "STM32F1xx_gpio", .file = "src/stm32f1xx/gpio.zig" }, .{ .target = stm32.chips.STM32F103C8, .name = "STM32F1xx_uart_echo", .file = "src/stm32f1xx/uart_echo.zig" }, .{ .target = stm32.chips.STM32F103C8, .name = "STM32F1xx_uart_log", .file = "src/stm32f1xx/uart_log.zig" }, - // .{ .target = stm32.chips.STM32F103C8, .name = "STM32F1xx_i2c", .file = "src/stm32f1xx/i2c.zig" }, + .{ .target = stm32.chips.STM32F103C8, .name = "STM32F1xx_i2c", .file = "src/stm32f1xx/i2c.zig" }, .{ .target = stm32.chips.STM32F103C8, .name = "STM32F1xx_i2c_bus_scan", .file = "src/stm32f1xx/i2c_bus_scan.zig" }, .{ .target = stm32.chips.STM32F103C8, .name = "STM32F1xx_hd44780", .file = "src/stm32f1xx/hd44780.zig" }, - // .{ .target = stm32.chips.STM32F103C8, .name = "STM32F1xx_ssd1306", .file = "src/stm32f1xx/ssd1306.zig" }, + .{ .target = stm32.chips.STM32F103C8, .name = "STM32F1xx_ssd1306", .file = "src/stm32f1xx/ssd1306.zig" }, .{ .target = stm32.chips.STM32F103C8, .name = "STM32F1xx_spi", .file = "src/stm32f1xx/spi.zig" }, .{ .target = stm32.chips.STM32F103C8, .name = "STM32F1xx_usb_hid", .file = "src/stm32f1xx/usb_hid.zig" }, .{ .target = stm32.chips.STM32F103CB, .name = "STM32F1xx_usb_cdc", .file = "src/stm32f1xx/usb_cdc.zig" }, diff --git a/port/stmicro/stm32/src/boards/STM32F303NUCLEO.zig b/port/stmicro/stm32/src/boards/STM32F303NUCLEO.zig index dcec005dc..c47a617a4 100644 --- a/port/stmicro/stm32/src/boards/STM32F303NUCLEO.zig +++ b/port/stmicro/stm32/src/boards/STM32F303NUCLEO.zig @@ -3,52 +3,9 @@ const std = @import("std"); pub const microzig = @import("microzig"); pub const hal = microzig.hal; -pub const rcc = hal.rcc; - -//pub const uart_logger = hal.uart.UARTLogger(.USART1); pub const leds_config = (hal.pins.GlobalConfiguration{ .GPIOA = .{ .PIN5 = .{ .name = "LD2", .mode = .{ .output = .{ .resistor = .Floating, .o_type = .PushPull } } }, }, }); - -//pub fn init() void { -// rcc.enable_hse(8_000_000); -// rcc.enable_pll(.HSE, .Div1, .Mul5) catch { -// @panic("PLL faile to enable"); -// }; -// rcc.select_pll_for_sysclk() catch { -// @panic("Faile to select sysclk"); -// }; -//} -// -//// Init should come first or the baud_rate would be too fast for the default HSI. -//pub fn init_log() void { -// _ = (hal.pins.GlobalConfiguration{ -// .GPIOC = .{ -// .PIN4 = .{ .mode = .{ .alternate_function = .{ .afr = .AF7 } } }, -// .PIN5 = .{ .mode = .{ .alternate_function = .{ .afr = .AF7 } } }, -// }, -// }).apply(); -// uart_logger.init(.{ -// .baud_rate = 115200, -// .dma = hal.dma.DMA1_Channel4.get_channel(), -// }); -//} -// -//pub fn i2c1() hal.i2c.I2C_Device { -// _ = (hal.pins.GlobalConfiguration{ -// .GPIOB = .{ -// // I2C -// .PIN6 = .{ .mode = .{ .alternate_function = .{ -// .afr = .AF4, -// } } }, -// .PIN7 = .{ .mode = .{ .alternate_function = .{ -// .afr = .AF4, -// } } }, -// }, -// }).apply(); -// -// return hal.i2c.I2C_Device.init(.I2C1); -//}